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GNRFET BASED 8-BIT ALU
Authors: H.V. RAVISH ARADHYA, MADAN H R, MEGARAJ T M, SURAJ M S, KARTHIK R K, MUNIRAJ R
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The advancement in IC technology rendering area optimized and fast ICs is primarily attributed to MOSFET scaling theory. The scaling theory sustained the Moore’s law till the channel size reached the nano-meter regime. The issues in MOSFET due to scaling aggregated and resulted in leakage currents and high power dissipation making the transistor unreliable. The research has been done to find a potential replacement for traditional CMOS and to sustain Moore’s law. Many alternatives like
CNTFET and FINFET based designs were found, but Graphene Nano Ribbon (GNRFET) based design was found to be more viable option in terms of area and power dissipation. Thus analysis of the circuits built using GNRFET is necessary to demonstrate its merits. The paper describes the design of GNRFET based 8-bit ALU and its comparison with conventional CMOS design with respect to power consumption, showing 0.1589W for GNRFET based design and 15.57W for CMOS design. For the design, 10nm process technology was used for GNRFET and conventional CMOS designs.